Exercises: Logic functions and truth tables
Write the truth table for the three basic operations of Boolean algebra ($f = a \cdot b$, $f = a + b$, and $f = \overline{a}$) and give an everyday sentence that behaves…
Write the truth table for the three basic operations of Boolean algebra ($f = a \cdot b$, $f = a + b$, and $f = \overline{a}$) and give an everyday sentence that behaves like each one.
The circuit in the figure combines two gates. Write the logic expression for its output $f$ in terms of the inputs $a$, $b$, and $c$, and reason which input combinations…
The circuit in the figure combines two gates. Write the logic expression for its output $f$ in terms of the inputs $a$, $b$, and $c$, and reason which input combinations set the output to $1$.
Complete the truth table for the function $f = a \cdot b + \overline{c}$ for the eight combinations of inputs $a$, $b$, and $c$, and state in how many of them the output…
Complete the truth table for the function $f = a \cdot b + \overline{c}$ for the eight combinations of inputs $a$, $b$, and $c$, and state in how many of them the output is $1$.
Write the truth table for the XOR (exclusive OR) gate and explain its characteristic statement ("the output is 1 when the inputs are different"). Give an everyday…
Write the truth table for the XOR (exclusive OR) gate and explain its characteristic statement ("the output is 1 when the inputs are different"). Give an everyday example: a two-way staircase switch, where two switches control the same light.
The figure shows two circuits with switches and a lamp. Explain what logic function each circuit performs (series and parallel), write its truth table taking "switch…
The figure shows two circuits with switches and a lamp. Explain what logic function each circuit performs (series and parallel), write its truth table taking "switch closed = 1" and "lamp on = 1", and reason why relay contacts allow any logic function to be constructed.
Explain what the canonical form of a logic function is (sum of products with all variables in each term) and why any truth table has a unique canonical form, even though…
Explain what the canonical form of a logic function is (sum of products with all variables in each term) and why any truth table has a unique canonical form, even though it may admit many equivalent simplified expressions.
Verify with reasoning (without tables) these properties of Boolean algebra: $a + 1 = 1$, $a \cdot 0 = 0$, $a + a = a$, $a \cdot \overline{a} = 0$. What does each one…
Verify with reasoning (without tables) these properties of Boolean algebra: $a + 1 = 1$, $a \cdot 0 = 0$, $a + a = a$, $a \cdot \overline{a} = 0$. What does each one physically mean if $a$ is a switch?
Write the truth table of the two-input NOR gate ($A$ and $B$) and explain how it is built from an OR gate and a NOT gate. State in one sentence when its output is $1$.
Write the truth table of the two-input NOR gate ($A$ and $B$) and explain how it is built from an OR gate and a NOT gate. State in one sentence when its output is $1$.
A warehouse alarm is activated ($s = 1$) when a door is opened ($p = 1$) or movement is detected ($m = 1$), but only if the system is armed ($a = 1$). Write the logic…
A warehouse alarm is activated ($s = 1$) when a door is opened ($p = 1$) or movement is detected ($m = 1$), but only if the system is armed ($a = 1$). Write the logic expression for $s$, construct its complete truth table, and draw the gate circuit.
You can do it on paper and send a photo with your answer.
Prove De Morgan's laws using truth tables: $\overline{a \cdot b} = \overline{a} + \overline{b}$ and $\overline{a + b} = \overline{a} \cdot \overline{b}$. Explain in your…
Prove De Morgan's laws using truth tables: $\overline{a \cdot b} = \overline{a} + \overline{b}$ and $\overline{a + b} = \overline{a} \cdot \overline{b}$. Explain in your own words what these laws allow you to do when designing circuits.
From this partial truth table the outputs are known: $f(0,0,0) = 0$, $f(0,0,1) = 1$, $f(0,1,0) = 0$, $f(0,1,1) = 1$, $f(1,0,0) = 0$, $f(1,0,1) = 0$, $f(1,1,0) = 1$,…
From this partial truth table the outputs are known: $f(0,0,0) = 0$, $f(0,0,1) = 1$, $f(0,1,0) = 0$, $f(0,1,1) = 1$, $f(1,0,0) = 0$, $f(1,0,1) = 0$, $f(1,1,0) = 1$, $f(1,1,1) = 1$. Obtain the canonical function as a sum of products (minterms) for the combinations that give $1$ and simplify it by applying properties of Boolean algebra.
A garage door only opens ($f = 1$) if the remote control signal is received ($m = 1$) and the manual bolt is not engaged ($c = 0$), or if the interior button is pressed…
A garage door only opens ($f = 1$) if the remote control signal is received ($m = 1$) and the manual bolt is not engaged ($c = 0$), or if the interior button is pressed ($b = 1$) without the bolt engaged. Write the logic expression, construct the truth table, and draw the gate circuit.
You can do it on paper and send a photo with your answer.
Prove the absorption law $a + a \cdot b = a$ in two ways: algebraically (by factoring out the common term) and with the truth table. Explain what practical use this law…
Prove the absorption law $a + a \cdot b = a$ in two ways: algebraically (by factoring out the common term) and with the truth table. Explain what practical use this law has when simplifying digital circuits.
A function of two variables, $F(A,B)$, must equal $1$ only when both inputs are equal. a) Write its truth table. b) Obtain its canonical expression as a sum of minterms.…
A function of two variables, $F(A,B)$, must equal $1$ only when both inputs are equal.
- a) Write its truth table.
- b) Obtain its canonical expression as a sum of minterms.
- c) Simplify it as much as you can.
- d) Compare the truth table of $F$ with that of the XOR gate (which equals $1$ only when the inputs are different) and explain the relationship between the two functions.
Simplify $f = \overline{\overline{a} + b}$ by applying De Morgan's laws and double negation, step by step, indicating each law used. Then draw the original circuit (NOT,…
Simplify $f = \overline{\overline{a} + b}$ by applying De Morgan's laws and double negation, step by step, indicating each law used. Then draw the original circuit (NOT, OR, NOT) and the simplified one, and count the gates saved.
You can do it on paper and send a photo with your answer.
A three-person committee votes by a show of hands; the proposal is carried ($s = 1$) if there is a majority. Write the complete truth table, obtain the function, and…
A three-person committee votes by a show of hands; the proposal is carried ($s = 1$) if there is a majority. Write the complete truth table, obtain the function, and simplify it to a sum of three products of two variables. Draw the circuit with two levels of gates.
You can do it on paper and send a photo with your answer.
In the control of a smart pedestrian traffic light, you design the circuit for the pedestrian green light ($V = 1$) based on three signals: pedestrian pushbutton ($P$),…
In the control of a smart pedestrian traffic light, you design the circuit for the pedestrian green light ($V = 1$) based on three signals: pedestrian pushbutton ($P$), approaching emergency vehicle sensor ($A$), and rush hour timer ($T$). The safety specifications are:
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If an emergency vehicle is detected ($A = 1$), the pedestrian light must remain red ($V = 0$) under any circumstance.
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In the absence of emergencies, pedestrian right-of-way is granted if the pedestrian requests it ($P = 1$) or if the timer indicates an automatic cycle ($T = 1$).
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For intrinsic safety against wire breakage, the sensors are wired with active-low logic: the pressed pushbutton delivers $P = 0$ (at rest $P = 1$) and the presence of an ambulance delivers $A = 0$ (at rest $A = 1$). The timer maintains active-high logic ($T = 1$).
- a) Build the truth table for output $V$ as a function of the actual measured logic signals ($A, P, T$).
- b) Obtain the simplified logic function in sum of products using a Karnaugh map.
- c) Justify what would happen to the safety of the intersection if the emergency sensor wire $A$ is accidentally cut (remaining at logic level $0$ due to a pull-down resistor) versus if it remains at high level ($1$). Which of the two options represents a fail-safe design?
An industrial water tank monitors its filling level with three float sensors placed at different heights: $A$ (upper), $B$ (intermediate), and $C$ (lower). Each sensor…
An industrial water tank monitors its filling level with three float sensors placed at different heights: $A$ (upper), $B$ (intermediate), and $C$ (lower). Each sensor outputs a logic $1$ when covered by water and a $0$ when in the air. An auxiliary drainage pump must be activated ($D = 1$) when the water level reaches or exceeds the intermediate sensor ($B$). However, if a physically inconsistent reading is detected due to a fault (for example, an upper sensor detects water but a lower sensor beneath it does not), a fault alarm signal must be activated ($F = 1$).
- a) Construct the complete truth table for the 8 possible combinations of $A, B, C$, identifying the permissible normal states and the fault states ($F = 1$).
- b) For controlling the pump $D$, under reliable operating conditions the fault combinations should never occur. Justify how you can use these impossible combinations as don't-care terms ($X$) in a Karnaugh map to obtain the simplified function for $D$.
- c) Compare the logic expression obtained in the previous section with the one that would result if, under a strict safety criterion, you decide that upon any inconsistency the pump must mandatorily turn off ($D = 0$). Justify the difference in gate cost and the safety trade-off between both alternatives.
In a production line, you must implement the stop circuit for an actuator whose simplified Boolean equation is $S = \overline{A \cdot B} + C$. In the warehouse, you only…
In a production line, you must implement the stop circuit for an actuator whose simplified Boolean equation is $S = \overline{A \cdot B} + C$. In the warehouse, you only have 74HC00 integrated circuits available (each IC contains 4 independent two-input NAND gates).
A technician directly replaces each operator with its standard equivalent and claims that they will need 2 complete ICs (5 NAND gates in total).
- a) Formally prove using De Morgan's laws and Boolean algebra that it is possible to implement function $S$ using only 4 two-input NAND gates, indicating which signals you must connect to each input.
- b) Draw the circuit diagram of the optimized circuit and reason how many 74HC00 integrated circuits are actually needed.
- c) In the CMOS technology of the 74HC00 IC, predict what technical problem would occur if you leave the inputs of the unused gates floating in an industrial environment with electromagnetic noise, and justify how they should be connected to avoid excessive power consumption or chip breakdown.
The goal is to design the comparison core for two 2-bit binary words, $A = A_1 A_0$ and $B = B_1 B_0$. The system must have two outputs: $I = 1$ when both numbers are…
The goal is to design the comparison core for two 2-bit binary words, $A = A_1 A_0$ and $B = B_1 B_0$. The system must have two outputs: $I = 1$ when both numbers are exactly equal ($A = B$) and $M = 1$ when the first number is strictly greater than the second ($A > B$).
- a) Obtain the truth table for the 4 input variables and determine, using Karnaugh maps, the minimal sum-of-products functions for $I$ and for $M$.
- b) Prove that the equality function $I$ can be factored as $I = \overline{(A_1 \oplus B_1)} \cdot \overline{(A_0 \oplus B_0)}$ and physically justify this result based on bit-by-bit comparison.
- c) Using the intermediate bit-equality signals ($e_1 = \overline{A_1 \oplus B_1}$ and $e_0 = \overline{A_0 \oplus B_0}$), derive a simplified expression for $M$ without needing to implement all canonical product terms, justifying the hierarchical reasoning that a processor follows to compare two numbers.
An arithmetic logic unit (ALU) uses two-input ($A, B$) half-adder (HA) blocks with sum ($S$) and carry ($C$) outputs. Each half-adder has a propagation delay of…
An arithmetic logic unit (ALU) uses two-input ($A, B$) half-adder (HA) blocks with sum ($S$) and carry ($C$) outputs. Each half-adder has a propagation delay of $10\text{ ns}$ for both its sum and carry outputs. In addition, OR gates with a propagation delay of $6\text{ ns}$ are available.
- a) Design the internal structure of a 1-bit full adder ($A_i, B_i$, and incoming carry $C_{in}$) by interconnecting two half-adders and an OR gate. Analytically justify why the two carry outputs of the half-adders can never be $1$ at the same time.
- b) Determine the critical path (maximum delay) to generate the sum $S_i$ and the outgoing carry $C_{out}$ from the moment the inputs change.
- c) If 4 of these full adders are connected in cascade to form a 4-bit ripple-carry adder, calculate the total time required for the 4-bit result and the final carry to be completely stable, and predict the maximum clock frequency at which the system will be able to operate.
An emergency cooling system must activate a turbine ($T = 1$) based on the state of three variables: critical pressure ($P$), high temperature ($E$), and forced…
An emergency cooling system must activate a turbine ($T = 1$) based on the state of three variables: critical pressure ($P$), high temperature ($E$), and forced ventilation failure ($V$). Safety requirements dictate that the turbine must activate for the minterms: $T(P, E, V) = \sum m(1, 2, 5, 6, 7)$.
To save board space, it is decided to implement the entire logic using a single commercial multiplexer with 4 data inputs ($D_0, D_1, D_2, D_3$) and 2 select inputs ($S_1, S_0$), without adding any external logic gates.
- a) Justify the theoretical basis of using a multiplexer as a universal logic function generator.
- b) If you connect variables $P$ and $E$ to the select inputs ($S_1 = P, S_0 = E$), determine with justification what constant value ($0, 1$) or signal ($V, \overline{V}$) must be connected to each data input $D_0, D_1, D_2$, and $D_3$.
- c) If due to wiring constraints the select inputs are swapped such that $S_1 = V$ and $S_0 = E$, find the new functions that must be fed into $D_0, D_1, D_2, D_3$ in terms of the remaining variable $P$.
The emergency stop circuit of an industrial packaging machine responds to three sensors $A, B, C$ according to the expression: $$P = \overline{A} \cdot B \cdot C + A…
The emergency stop circuit of an industrial packaging machine responds to three sensors $A, B, C$ according to the expression:
$$P = \overline{A} \cdot B \cdot C + A \cdot \overline{B} \cdot C + A \cdot B \cdot C + A \cdot B \cdot \overline{C}$$It is currently assembled using inverters, 3-input AND gates, and a 4-input OR gate.
- a) Simplify the function $P$ using a Karnaugh map to obtain the minimal sum-of-products expression. How many total gates and inputs do you save compared to the original assembly?
- b) An operator states: "We can replace the entire circuit with a single three-input XOR gate, $P = A \oplus B \oplus C$, because the truth table matches for most combinations." Prove using the truth table whether this statement is true or false, indicating for which input combinations the machine would behave incorrectly.
- c) Analyze the simplified function on the Karnaugh map: if the inputs transition from $ABC = 110$ to $ABC = 111$, predict with justification whether there is a risk of a spurious transient pulse (glitch or static 1-hazard) appearing at the output due to the switching delays of the gates, and justify how this hazard would be resolved.
The lighting of an underground technical gallery is controlled from three independent locations using two-way and intermediate switches ($A, B, C$). Actuating any switch…
The lighting of an underground technical gallery is controlled from three independent locations using two-way and intermediate switches ($A, B, C$). Actuating any switch must immediately invert the state of the lamp ($L$), whether it is on or off. Initially, with all controls in the resting position ($A = 0, B = 0, C = 0$), the light is off ($L = 0$).
- a) Build the truth table and prove that the combinational logic function describing the lamp corresponds to an odd parity function: $L = A \oplus B \oplus C$.
- b) Algebraically justify whether the switching order of the switches alters the final result, taking advantage of the associative and commutative properties of the XOR operation.
- c) In a real installation, logic integrated circuits are not used, but rather two end two-way switches and one intermediate four-way crossover switch supplied at $230\text{ V}$. Draw the single-line/multi-line electrical schematic of the three mechanisms and the lamp connected to Phase and Neutral. Justify what functional fault would occur if the intermediate crossover switch were mistakenly replaced by a standard double-pole switch.